#Vivado download 2016.4 how to#

How to setup the ZCU102 evaluation board and run the reference design.The data is sent to the APU via the OpenAMP communication framework and plotted on the GUI. The RPU is used to monitor the live memory throughput of the design by reading the built-in AXI performance monitors (APM) inside the PS. The APU load is plotted on the GUI to compare a pure software vs hardware accelerated implementation. The TRD demonstrates the value of offloading computation intensive tasks like the 2D-convolution filter from the PS onto PL, thereby freeing APU resources. A display pipeline with two layers, one used for video and the other for a graphical user interface (GUI) rendered by the GPU.A memory-to-memory processing pipeline implementing a 2D-convolution filter with programmable coefficients.a test pattern generator (TPG) implemented inside the PL.a USB webcam connected to the PS (optional).a virtual video device (vivid) implemented purely in software.Video capture pipelines capturing video from:.The design consists of the following video data paths:

The Zynq UltraScale+ MPSoC Base Targeted Reference Design (TRD) is an embedded video processing application running on a combination of APU (SMP Linux), RPU (bare-metal) and PL.

Use X11 Qt and Mali backend instead of fbdev.

Add virtual video device (vivid) support for video capture.

Add USB webcam support for video capture (USB2 only!).

Remove support for HDMI input via FMC-HDMI-CAM.

Split reference design into 9 design modules with dedicated tutorials.

Add support for ZCU102 rev 1.0 board with ES2 silicon.

Update all projects, IP and tools versions to 2016.3, except Petalinux.

Vivado download 2016.4